1. Field of the Invention
The present invention generally relates to a bus that is configured to transmit both processor related communication and memory related communication between two processor modules.
2. Background of the Related Art
Some computer systems have more than one central processing unit. A central processing unit is a brain of a computer. Accordingly, some computer systems have more than one brain. Each central processing unit may also have other supporting hardware, such as memory (i.e., DRAM). In such computer systems, it is necessary for the at least two processors and the at least two memories to communicate with each other.
Unfortunately, problems do exist in this communication between a plurality of processors and a plurality of memories. One problem is that the cost is prohibitive to include separate mechanisms for communicating between memories and communicating between processors. Also, there are problems with errors in the communication between the two processors or the two memories. Additionally, the communication between processors or memories may be too time consuming and therefore slow down the entire computer system.